We will look into how to reverse engineer FPGA bitstreams primarily focused on iCE40 FPGAs from Lattice Among the topics we will cover will be:

• FPGA architecture, both in general and specific to iCE40
• The open source FPGA toolchain for iCE40: icestorm, yosys, nextpnr, ...
• How to read a schematic or block diagram
• Reverse engineering tools for FPGA: python3, and pen and paper, and possibly HAL

Schedule:

Not scheduled yet

In this talk we will have a look at a ConnectX-5 100G NIC from NVIDIA/Mellanox We will reverse engineer a custom CPU architecture which is used inside the NIC and create a ghidra processor module for it.

https://github.com/irisc-research-syndicate

Schedule:

• Friday, Jul 19th, 2024, 16:00 (CEST) - Friday, Jul 19th, 2024, 17:00 (CEST)